TIS-100

TIS-100

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skyhrg Aug 31, 2015 @ 8:41pm
[SPOILER] My Lowest Cycle Solutions
Hello

If anyone is interested, I have posted below my solutions for very fast cycle solutions. The key here is parallel computation and computation distribution to avoid bottlenecks and do simultaneous computations. Calculate multiple values at the same time.

Here are the results and the solutions. As you can see, the results in cycles are very optimal compared to the multiplayer solution distribution:

Differential Converter (133 cycles)
http://steamcommunity.com/sharedfiles/filedetails/?id=518436393
http://steamcommunity.com/sharedfiles/filedetails/?id=518436423
Somehow a guy named Entity managed to shave this down to 133 cycles. Crazy, I know.
Again, I used 3 cores.
EDIT: I got it down from 146 cycles to 133 using the "sub" trick from the original neg method.

Signal Multiplexer (176 cycles)
http://steamcommunity.com/sharedfiles/filedetails/?id=510196828
http://steamcommunity.com/sharedfiles/filedetails/?id=510196738

Sequence Generator (86 cycles)
http://steamcommunity.com/sharedfiles/filedetails/?id=510196814
http://steamcommunity.com/sharedfiles/filedetails/?id=510196780

Signal Edge Detector (164 cycles; 3 Core)
http://steamcommunity.com/sharedfiles/filedetails/?id=510800370
http://steamcommunity.com/sharedfiles/filedetails/?id=510800386
The 3 core method is actually better than having 4 cores because of the "Communication Failure" node on the bottom left. This causes a huge bottleneck in the input and output distribution. (If you read the comment on the 3 core picture, switch the appropriate input lines to shave cycles to 164.)

Signal Edge Detector (4 Core)
http://steamcommunity.com/sharedfiles/filedetails/?id=510801210
http://steamcommunity.com/sharedfiles/filedetails/?id=510801240
Last edited by skyhrg; Sep 14, 2015 @ 1:42pm
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Showing 1-6 of 6 comments
Cynthaer Sep 1, 2015 @ 8:02pm 
This is pretty great. After I replicated your solution in Signal Multiplexer, I was able to apply it myself in Sequence Generator and come up with essentially the same solution you did (though I didn't think of moving the SWP commands around to shave that last dozen cycles off).
skyhrg Sep 1, 2015 @ 8:44pm 
Originally posted by Cognition Attrition:
This is pretty great. After I replicated your solution in Signal Multiplexer, I was able to apply it myself in Sequence Generator and come up with essentially the same solution you did (though I didn't think of moving the SWP commands around to shave that last dozen cycles off).

Thanks!

I'm working on more and it's really fun! I'll be sure to post more good results if I come up with any :)

EDIT: I added one more. Check it out if you want~ :)
Last edited by skyhrg; Sep 1, 2015 @ 9:05pm
GuiltyBystander Sep 1, 2015 @ 10:31pm 
Those are pretty good. Better than some of mine I think. If you want to compare to some other fast times, check out the unofficial leaderboard on the subreddit. You're just behind the ones there.

https://www.reddit.com/r/tis100/comments/391heb/table_of_lowest_cyclesnodesinstructions/
skyhrg Sep 1, 2015 @ 10:34pm 
Originally posted by GuiltyBystander:
Those are pretty good. Better than some of mine I think. If you want to compare to some other fast times, check out the unofficial leaderboard on the subreddit. You're just behind the ones there.

https://www.reddit.com/r/tis100/comments/391heb/table_of_lowest_cyclesnodesinstructions/

Yeah, some of those results pretty crazy. I have no idea how they shave off like 40~50 cycles
Brian Sep 14, 2015 @ 10:52am 
Originally posted by skyhrg:
Somehow a guy named Entity managed to shave this down to 133 cycles. Crazy, I know.

You are very close to matching the 133 cycle record here; there is just one more simple trick that you need to find. If you make this change to all 3 cores, each one should be able to run with no idle cycles while they are processing inputs. Let me know if you want a bigger hint!
skyhrg Sep 14, 2015 @ 1:38pm 
Originally posted by Brian:
Originally posted by skyhrg:
Somehow a guy named Entity managed to shave this down to 133 cycles. Crazy, I know.

You are very close to matching the 133 cycle record here; there is just one more simple trick that you need to find. If you make this change to all 3 cores, each one should be able to run with no idle cycles while they are processing inputs. Let me know if you want a bigger hint!


Yeah, I JUST got it. Instead of using "neg" if you just subtract the other value, I get 133 cycles. I've updated the main post :)
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Date Posted: Aug 31, 2015 @ 8:41pm
Posts: 6