Latch clitch?)

[daemonaa]

good day.

it seems the actual working of Latch gate differs from its description in the User Guide.
it says that Latches toggles on the rising edge of any input.

i built such a scheme:
VCB+AAAAj+4vwe1hAAAABwAAAAMAAABFAAAAAAAAAFQotS/9IFSFAQDIAAAuR13//2KK/004Pv84TUehmFb/AJL/YwkAW908FSAmwc8AcKYzI+xuvNg0ACwAAAAdAAAAAQAAAFQotS/9IFRFAAAQAAABAI8CLAAAAB0AAAACAAAAVCi1L/0gVEUAABAAAAEAjwIs

or it looks like
rNwr0
0w 0
rBwr0
where 0 are latcnes (there's two, right one is single gate)
r,w - Write and Read cells
N - Not gate and B - buffer gate

i was expecting that the right latch will repeat toggling the left one.
because it have rising edge on one of its inputs on every change left one's state.

but it is still dividing incoming frequence by 2, acting as if it has only one (lower) input.

it seems that incoming together rising and lowering edges works in 1/2 cases.

am i misunderstood something?)

PS and btw, i discovered this while trying to toggle two latches in one tick in pause mode - i can toggle ony one. but later i found UG says "mouse interaction with the simlation paused is not supperted yet".. It partly is - you can toggle one latch per tick in pause mode, but not more) hope it'll be fixed.

[daemonaa]

--rNwr0
0w----0
--rBwr0
actually. vertical r-w-r is single wire from |N latch to N and B gates.