Zero-power switches (flip-flop/latch)

With the logic gates, you can build some amazing low-power solutions. A flip-flop lets you toggle between two states with a single signal, and can be incredibly useful.

What is a flip-flop

A flip-flop is a combination of basic logic gates, that lets you store one bit of information. Literally one bit, an on/off state and nothing else.

This can be incredibly useful in some cases, where you need something to flip on or off and stay that way!

To borrow an illustration from Wikipedia:

(Licensed as Creative Commons Attribution, source[commons.wikimedia.org])

A flip-flop has two inputs and two outputs. The inputs are meant to be low (zero) most of the time, and only go high (100) when you want the state to change. The outputs are always inverse of each other: When one output is high, the other is low, and vice versa.

In the diagram above, the flip-flop is built using two NOR gates, "not-or" gates. These take two inputs, and its output is high only if both inputs are low. NOR gates are commonly used in real electronics, because they are simpler to build than OR gates. You can tell the gates used are NOR by the symbol: It has the curved back end, which shows it's an OR function, and then has a little dot on the output, which shows the output is negated.

The same symbols are used for gates in Shenzhen I/O, but you don't have NOR gates available there, but you do have OR and NOT gates. So just place two of those in a row to get the effect of a NOR!

Simple Shenzhen I/O flip-flop

If you take the design of a flip-flop and directly make it in the sandbox in Shenzhen I/O, you get something like this:



It's difficult to cross the connections, so they have to go around.

There's a push-button hooked up to each input, and a LED light on each output. If you push the lower button, the upper LED turns on and the lower off, and if you push the upper button, the lower LED turns on and the upper off. It works!

But it takes up a huge amount of space on the board. However, notice that the lower half essentially loops onto the upper part. What if you take that lower part, rotate half a turn, and puts it up next to the other part?



Much better! It works the same, but takes up less space. I've spaced things out for illustration here, but you can compact it a little bit more by taking out the middle column.

Even simpler version

The above naive version works fine, and you may even be able to fit it onto lots of boards, but... what if you could make it even simpler?

Turns out, it is possible.

When you don't need isolation between the two inputs to each OR gate, you can entirely skip those. In Shenzhen I/O, connecting two outputs to one input, the input will always see only the highest of the outputs, almost exactly what the OR gate does.

So how about this:


Or smaller yet:


You're down to just 4x2 for a flip-flop, now that is a design you can fit in almost anywhere.

Now it's your turn: Find some puzzles to optimize with this one trick 诚尚Micro doesn't want you to know!

[sh20000sh]

Another smallest possible way is, might be derailed solution, but using single PGA33X6. It has single latch included so you can simply connect two of inputs directly into S and R, and make connect output directly from latch and connect with internal NOT gate. https://imgur.com/a/MDLNyJj

[Norgus]

I found that both the flip-flop and the smaller version with just the invertors are unpredictable as to which state they will be in at the beginning of a test.

It's possible to reset them with a pulse, or if you can't afford to sleep a cycle at the beginning, send 100 to reset, run a nop, send 0 to reset.

This works but is still really inconvenient and feels quite wasteful, so perhaps the and/or pair is more practical as mentioned by caitsith2.

[ivpn]

I think worth adding to the guide - upgrade options into gated flip-flop (appears on the same wikipedia page linked from the guide):
Usually just adding AND gate (LC70G08) on Set/Reset signals with Enable signal is enough. But it takes same space as the latch (4x2) for each signal. It can be narrowed to mere 6x1 (4x1 if counting only gates) by placing 2 NOT gates (LC70G04) in a row on the signal, and feeding inverted Enable signal between them.
This can even be split into several non-adjusent rows in the board, if needed.
Not sure yet where this can be usefull, I only now reached the "bonus stages" and starting to look at the optimization of the main puzzles.

[Charming Cthulhu]

No, don't remove the complex versions. It makes it easier to understand the concept.
Some more basic theory would be nice, like why you shouldn't push 2 buttons at the same time.

[jfs]

Yeah I'll rework this with the changed logic gates some time soon. Right now, another game is taking my interest though, sorry :)

[Ozone]

You should remove the complex versions and put only the simple one.

[caitsith2]

this guide could be updated to reflect the fact that all the logic gates now have a normal output and a reversed output.

also, if you wish to have a sr latch that is guaranteed to be in a particular state, go with the and/or pair, with a not on the reset input. or gate output feeds into one and gate input. not gated reset line goes in the other and gate input. and gate output feeds into one or gate input. other or gate input is the set line.

[jfs]

Well the arithmetic functions for logic gates patch was reversed again, so it invalidates some of the potential savings, but the one I had success on (with arithmetic function gates) was the headphones. Using a flip-flop to hold and switch the "output blocked" state, and then another set of gates to multiplex between silence and input audio.

[bitski]

Actually yes, the image Vandalite posted works just as yours does. You can move both buttons and LEDs in one tile and run "C" shaped traces to connect the pins. :) Great post by the way! What puzzles were you refering to with low-power solutions?

[jfs]

Actually no, you can't make this one smaller :) The logic gates are 2 tiles wide, not 3, so there isn't any room to pull circuits below, and they have to extend 1 on each side of the component ports.