Feels like a true Zachtronics... because when I can't hit the best score I feel stupid :D

[Dekkhan]

Feels like a true Zachtronics... because when I can't hit the best score I feel stupid :D

seriously, how do some people get things in like 4 nands when I need at least 5 and can't see another way to rewrite it in fewer :D

What would be cool;
- if whatever we build off of a given part, inherits those (in)efficiencies;
- if when we eventually do ingame build a gpu, if the performance is then graded based on that;
- if the "best" score solution can somehow be hinted at, without just telling the answer (i.e. teaching people how to derive it instead?).

This is definitely a fun game though, nicely done.

[wheatley]

Haha, that “surely I can remove one more NAND…” feeling is very familiar :D

Thanks for the thoughtful feedback!

Your chips already carry their NAND cost and delay into anything built from them, but the game wasn’t making that clear enough. I’ve added a breakdown so you can see where those costs come from.

I’ve also connected the GPU performance projection to your earlier chip designs and your program. Improving an old chip feeds through into later designs, with area and speed measured separately.

And your hint suggestion is now implemented throughout the campaign: small nudges toward an optimization idea, without giving away the circuit. They appear when you revisit a completed level or choose to improve it, so the first guided build stays focused on learning.

These changes are implemented locally and will be in the next update. Thanks for helping make the game better!

[Dekkhan]

I was dearly hoping that you'd already done those things, because it made sense; otherwise why would building a GPU start with logic gates? :D
So I'm so, so pleased to hear that you already had it.

The hint suggestions are very, very welcome and I look forward to seeing them in the demo or full game. :D Because I very much am expecting that this is going to be good :D

This does also make me feel like when we get e.g. the create a graphics card level, that I'd want to go back and change NAND to use three NAND gates instead of just one, and watch the cost skyrocket and performance plummet. :D Which makes me think about the cost cascading...

What counts for optimal when it comes to later designs? If you have one design with low NAND count but high processing time and one design with low processing time cost but high NAND count, does it take the best of all your designs cherrypicked together? the worst? just one of them?
That's an interesting question to me :D

It might be neat as well if you can e.g. simulate a worse design at a given part of the stack and watch the effect ripple down the later designs with no other changes. That sounds, statistically, fascinating to me :D

OK, I'll be quiet now and look forward to changes :D

[wheatley]

Please don’t be quiet, these are exactly the kinds of questions I want people asking :D

One clarification from my previous reply: chip costs already carried through nested logic circuits. Connecting those designs to the GPU performance projection is part of the new update.

The rule is the latest successfully delivered version of each campaign chip. It doesn’t cherry-pick the smallest version’s NAND count and the fastest version’s delay. Both come from the same actual design. Your personal-best score is stored separately; simply editing a draft doesn’t replace the chip.

So a smaller, slower design and a larger, faster one really are different trade-offs. Which helps the GPU depends on what’s limiting it: computation, memory bandwidth or power.
Your deliberately-worse-chip experiment is possible by replacing a reusable chip, such as XOR, with a functionally identical but less efficient version. Deliver it, reopen the later design, and its updated costs feed through wherever that chip is used. The primitive NAND itself stays the fixed building block.

I actually tested this by adding two unnecessary inversions inside XOR: the modeled GPU core grew from 1,545 to 1,609 NANDs, and its estimated path depth increased from 26 to 30 ticks, without rebuilding the parent chips.

The GPU figures are a simplified performance projection, but that “change one thing and see how far the consequences travel” idea is very much there :D

[Dekkhan]

> that “change one thing and see how far the consequences travel” idea is very much there :D

This is genuinely exciting. :D

[wheatley]

:)

[Raventail]

This game seems to explain the inner workings of logic gates better than other similar games like this I've played, though I'm still hitting a wall when it comes to exclusive operations.
I'm also struggling when it comes to knowing the NAND cost of the various gates and understanding how "depth" works in a layout.

Update: It took all of the hints, but I completed the XOR puzzle.

[wheatley]

thanks for feedback. yes xor part is challening, i couldn't find better explanation yet. i am still trying to improve that part. if you have any suggestions please let me know

[Dekkhan]

I went back and did XOR. My god I would never have thought of that answer.

It feels like, once you know, the result makes sense; but deriving that going forwards instead of looking backwards? I have no idea how one would.

[wheatley]

i published an update for that. i hope it will help new players. i tried to reduce pacing for those levels, there are some extra sub levels now.