library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity owen is
port (skill : out std_logic_vector(7 downto 0));
end entity;

architecture owen_arch of owen is
signal skill_buf : signed(7 downto 0);
begin

skill <= std_logic_vector(skill_buf);

skill_buf <= to_signed(-128, 8);

end architecture;

Will never forget meeting this cutie pie at LAN :)

<3

~rep stop playing pubg

Merry christmas oh wait

+rep Whowen is a great kid. He is consistently at the top of his class, with a passion for math and science. I fully expect him to excel next year in the fifth grade.